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  -.. analog w devices i features 16-bit resolution j: 0.003% maximum nonlinearity low gain drift j: 7ppm/oc 0 to + 70c operation (ad dac71, ad dac71h, ad dac72c) - 25c to + 85c operation (ad dac72) current and voltage models available improved second-source low cost product description the ad dac71 and ad dacn are high resolution 16-bit hybrid ic digital-to-analog converters including reference, scaling resistors and output amplifier (v models). the devices offer outstanding accuracy, including maximum linearity error of 0.003% at room temperature and maximum gain drifts of 15ppmrc (ad dac71, ad dac7ih, ad dacnc) and 7ppm/c (ad dacn). this performance is possible due to the innovative design, using proprietary monolithic d/a converter chips. laser-trimmed thin fllm resistors provide the linearity and wide temperature range for guaranteed monotonicity. the ad dac71 and ad dacn digital inputs are itl-com- patible. coding is complementary straight binary (csb) for unipolar output versions and complementary offset binary (cob) for bipolar output versions. all versions are packaged in a 24-pin metal dip. the ad dac71, ad dac71h and ad dacnc are specified for operation from 0 to + 70c, and the ad dacn is specified from - 25c to + 85c. the ad dac7ih, ad dacn and ad dacnc are supplied in hermetically-sealed packages. the ad dac71 and ad dacn are intended to serve as improved second sources to dac71 and dacn devices from other manufacturers. *covered by patent numbers: 3,978,473; re28,633; 4,020,486; 3,747,088; 3,803,590; 3,961,326; 4,213,806; 4,136,349. high resolution 16- bit 0/ a converters ad oac71/ao dac72* ad dac71/ad dac 72 functional block diagram if1 summing junction bit 9 ad dac71/ad dac72 product highlights 1. the ad dac7l and ad dacn provide l6-bit resolution with 0.003% linearity error. 2. the proprietary chips used in the hybrid design provide excellent stability over temperature and improved reliability. 3. unipolar and bipolar current and voltage output versions are available to fill a wide range of system requirements. 4. the ad dac71 and ad dacn are improved second source replacements for dac71 and dacn devices from other manufacturers. . ~ ~-~~~ obsolete
specifications (@ ta = + 25c, rated power supplies unless otherwise noted) 2-306 digital-to-analog converters ad dac71/ad dac71h ad dac72c ad dac72 model min typ max min typ max min typ max units digital inputs resolution 16 16 16 birs logic levels (ttl-compatible)t logical "i" + 2.4 +5.5 +2.4 + 5.5 +2.4 +5.5 vdc logical "0" +0 +0.4 +0 +0.4 +0 +0.4 vdc accuracy' linearity error at 2s'c 000.003 =0.003 =0.003 % offsr3 gain error', voltage =0.01 =0.1 =0.05 =0.15 =0.05 =0.15 % current =0.05 =0.25 =0.05 =0.25 =0.05 =0.25 % offset error" voltage, unipolar =0.1 =2.0 =0.1 '" 2.0 ",0.1 =2.0 mv voltage, bipolar =5.0 = 10.0 = 10.0 mv current, unipolar = 1.0 = 1.0 = 1.0 fla current, bipolar =5.0 =5.0 =5.0 fla monotonicily temp. range (14-birs) o +50 o +50 o +70 'c drift (over specified temp. range) total bipolar drift (includes gain, offset, and linearity drifl) voltage '1' min to 2s'c ",7 = is ",7 '" is =5 '" 19 ppmoffsri'c 25'ctotmu =7 = is =7 '" 15 =5 ",ii ppmoffsri'c current tmintotmu +15 + is +10 ppmoffsri'c total error over temp. ranges voltage, unipolar tminto+2s'c ",0.083 "'.083 ",0.100 %offsr +2s'ctotmu = 0.083 = 0.083 ",0.072 %offsr voltage, bipolar tminlo +2s'c ",0.071 '" 0.071 =0.100 %offsr +2s'ctotmu ",0.071 =0.071 ",0.072 %offsr current, unipolar ('1' mln to '1' mu) =0.23 =0.23 =0.24 %offsr bipolar ('1' min tot mu) =0.23 ",0.23 ",0.24 %offsr temperature coefficients gain voltage tminlo +2s'c '" is = 15 = 15 ppmoffsri'c + 2s'c to '1' mu '" 15 ",is ",7 ppmoffsri'c current '" is = is ",10 ppmoffsri'c offset voltage, unipolar "'i =2 "'1 =2 "'1 =2 ppm offsri'c bipolar = 10 =10 =8 ppmoffsri'c currenl, unipolar ",i ",i ",1 ppmoffsri'c bipolar = 15 ",15 "'10 ppmoffsri'c differential linearily over temperalure ",2 =2 = i ppmoffsri'c linearity error over temperalure ",2 =2 ",1 ppm offsri'c settling time vollage models(lo '" 0.003% offsr) output: 20v step 5 10 5 10 5 10 fls ilsb step' 3 5 3 5 3 5 fls slew rate 20 20 20 vlfls current models (to '" 0.003% offsr)7 output: 2ma step ion to loon load 1 i i fls ikn load 3 3 3 fls switching transienl 500 500 500 mv analog output voltage models ranges-csb 010 11o 010 , 10 oto.. 10 v cob c'c1o ,,10 '10 v output currenl 5 c'c5 5 ma ouipui impedance (de) 0.05 0.05 0.05 n short circuit duralion indefinite 10 common indefinilclncommon indefinite in common current models ranges-csb 010 2 () 10 2 oto - 2 ma cob 'i 'i "i ma outpui impedance-unipnlar 6.0 6.0 6.0 kn bipolar 3.0 3.0 3.0 kn compliance ].5 ,]0 is i ]0 is , ]0 v internal reference voltage 6.0 6.3 6.6 6.0 6.3 6.6 6.() 6.3 6.6 v maximum external current' ,3 '3 3 ma temp. coeff. of drift ',1o '10 ,,5 nnml"c power supply sensitivity ljnipnlaroffset = isvdc ().0001 + 0.0001 ',0.000] %nffsri%v, i 5vdc ,0.0001 'o.()()o1 'o.()()()] %offsr/%v, bipolar offsot .iwdc . o. 0004 '. 0.q()()4 'o.00()4 %nffsr/% v, i 5v de '" o.()()()] ,o.q(xji '().oooi % of fsri% v, obsolete
. notes 'adding full seak rang sub, rar..~r..a v 1l"i'u 1 nr.. ft\...\...uaft\...l vi' 111~ ftu ul\l.;j 1 and ad dac72 a great deal of care must be exercised when using high resolution converters such as the ad dac71 and ad dac72. since one least significant bit of a 16-bit converter (lsb) represents an analog voltage of only 153 microvolts out of a iov scale, normally negligible error sources become significant. series resistances of connectors and wiring can be major contributors, as can ther- mocouple effects. figure 3 illustrates the connections for voltage output versions of the ad dac71 and ad dac72. ad dac71 and ad dac72 csb-v rw, + rwad vwad rw, to other analog circuits to power supply return figure 3. ad dac71 and ad dac72 connection diagram (voltage models) in this circuit, the analog output voltage is accurately developed between pin 17 and pin 20 of the dac. the voltage measured at the load will be inaccurate if there is significant resistance in the wiring (and any connectors) between the dac and the load. if the load resistance is constant, the effects of rwi and rw2 can be treated as a simple gain error, and can be trimmed out. however, if rl is variable, then rwi and rw2 should be re- duced to a value less than rl2~in. this will reduce the effect of the wiring resistances to a gain error of less than llsb. the ad dac71 and ad dac72 are rated at an output current of sma which translates to a minimum load resistance of 2kn. thus wiring resistances should be held to a maximum of 30 milliohms. this corresponds to approximately six inches of #28 wire or a six inch long printed circuit track 0.050 inches wide. the current output versions of the ad dac71 and ad dac72 use an external operational amplifier to convert the output current to an output voltage. the recommended configuration is shown in figure 4. notice that this configuration permits the voltage at ad dac7' and ad dac72 csb-i r-- 5ku r, rw, rw, l~' rwad rw, or. ~ 2.7ku for csb r. ~ 1.8ku for cob to other analog circuitry to power supply common figure 4. connections for ad dac71 and ad dac72 current output versions 2-308 dlgital- to-analog converters the load to the sensed remotely. the resistance (rwi) of the lead connecting the load to the internal feedback resistor in- troduces a gain error equal to ~, independent of rload i\.load and rwz. the error contributed by rw3 depends upon where the output is measured. if the output is measured between the top of rload and pin 20 of the dac, no error results since rw3 effectively becomes part of the load resistance. in applications where rw3 is large or large currents flow in rw3, it is necessary to use remote sensing as shown in figure 5. ad dac71 and ad dac72 csb-i rm 5k rw, rwao + } vout ---0 - (remote analog ground) rwa ra + rwa ~ 5k + rw, rw, to power common figure 5. use of output amplifier as subtractor for remote ground sensing this circuit uses the output amplifier as a subtractor stage. any spurious voltage developed across rw3 becomes a common mode voltage and its error contribution is reduced by the common mode rejection of the op amp. in the circuits of both figure 4 and figure 5, rw2's effect is negligible since it is inside the loop of the amplifier. if current boosting is required in order to drive heavy loads, a suitable booster stage can be inserted between the amplifier's output and the load. since the loop is closed from the load end, offsets and other errors induced by the booster are eliminated. it is also important to minimize thermocouple effects in circuitry using the ad dac71 and ad dac72. recalling that llsb of a 16 bit, 10 volt scale converter is only 153 microvolts, a stray uncompensated thermocouple can introduce several lsbs of offset in response to minor changes in ambient temperature. any part of a circuit which includes a junction between two dissimilar metals forms a thermocouple. such junctions include connectors, sockets, and any soldered connections. the solution to thermocouple errors is to insure that every junction is cancelled by an identical, but opposite, junction at the same temperature. while this is often automatically accomplished (for example, in a connector carrying both signal and return leads), careful attention should be given to the physical layout of circuits using the ad dac71 and ad dac72. another source of signal degradation in high-resolution converter circuits is magnetically-coupled interference from stray fields. signal and return leads should be arranged in a way which minimizes both length and the total cross-section area of the loop. of course, high resolution circuits should be located as far as possible from any sources of electromagnetic interference, including power transformers, digital logic and electromechanical devices. -- obsolete
dh-24d 24-lead metal platform dip 24 13 see note 1 " 1 12 d ~ fe===] j4 111 a .1 ~1 + cpb cpb ...fj.- ..je~ i- e, .f notes 1. index area; a colored bead or identification mark is located at lead one. 2. the basic pin spacing is 0.100" (2.54mm) between centerlines. 3. e, shall be measured at the centerline of the leads. ii inches millimeters symbol min max min max notes a 0.250 6.35 cpb 0.016 0.020 0.41 0.51 d 1.385 35.18 e 0.810 20.57 e, 0.590 0.610 15.00 15.50 3 e 0.100bsc 2.54 bsc 2 l, 0.140 0.210 3.56 5.33 obsolete


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